Reducing AOI Bottlenecks in Advanced Packaging Inspection
As advanced packaging inspection requirements continue to increase in complexity, system engineers are facing growing challenges beyond image quality alone. High data throughput, CPU-intensive algorithms, bandwidth limitations, and system latency are becoming critical bottlenecks that directly impact inspection speed, alignment accuracy, and production stability. In this webinar, we will deep dive into key pain points in advanced packaging, and how it impacts inspection performance and yield.
This webinar is brought to you by Soda Vision and Basler.
Building Scalable AOI Architectures for Advanced Semiconductor Inspection
Next-generation AOI systems are no longer limited only by camera resolution or software algorithms. They are increasingly limited by system architecture: where image processing happens, how much data needs to be transferred, and how fast inspection decisions can be made.
As advanced packaging technologies continue pushing AOI systems toward higher speed, higher precision, and larger data volumes, traditional PC-based inspection architectures are increasingly facing limitations in throughput, latency, and inspection stability.
This webinar explores common AOI bottlenecks found in advanced semiconductor inspection applications, including BGA inspection, wire bonding, die alignment, and wafer surface inspection, and discusses approaches for improving real-time inspection performance, scalability, and processing efficiency in next-generation AOI systems.
Key takeaways include:
Understanding why next-generation AOI systems are increasingly limited by system architecture rather than image resolution alone
Explore practical approaches to improving inspection stability, latency, and system scalability in high-speed AOI environments
Discover challenges related to inspecting complex 2.5D and 3D packaging structures with height variations and difficult imaging conditions
Learn how optimized image processing approaches can help improve defect detection reliability in micro inspection applications
Who will benefit:
AOI system integrators and OEMs
Engineers involved in the development and design of AOI systems
Engineers seeking to enhance inspection speed to meet high throughput (UPH), low latency, and high yield requirements.
Professionals exploring new vision approaches for semiconductor inspection
Date and time:
8 July 2026 (Wednesday) 3:00 – 3:30PM (SGT)