Your browser is out of date. It may not display all features of this websites. Learn how to update your browser.

OK
Careers | Investors

microEnable 5 marathon AF2 - Frame grabber

microEnable 5 marathon AF2 is a PCIe image acquisition device that allows an optical fiber connection of two cameras of Camera Link HS standard.

microEnable 5 marathon AF2 focuses on high-speed image acquisition with up to 2 x Camera Link HS cameras and offers with DMA1800 technology and optical connections an powerful access to special Machine Vision applications.

  • First Camera Link HS F2 Frame grabber with fiber optics cable support
  • Dual 1200 MB/s F2 fiber optic 300 meter distance interface (SFP connectors)
  • Support of Area and Line Scan cameras
  • Topologies: Multi-Camera/Single-frame grabber and Single-Camera/Multi-Frame grabber
  • DMA 1800 / up to 1800 MB/s PCIe Data bandwidth (PCIe x4 Gen2)
  • Opto-isolated front GPIO from 4,5 – 28V, TTL Outputs, RS 485 interface
  • Internal GPIO – interface with support for ad-on GPIO-Boards (requires additional slot)
  • 100% compliant with Silicon Software SDK und GUI control and services tools
  • Flexible and extensible model series
  • IP Core available from AIA ensuring interoperability and short development times.

Add to request cart
Add to watch list
  • Frame grabber - microEnable 5 marathon AF2

Article Details

Model Name microEnable 5 marathon AF2
Order Number 2200000362
Series A-Series
Category Framegrabber

Device Features

Processor System Processor
On-Board Memory 512 MByte DDR3-RAM

Camera Interface

Standard Camera Link HS
Configurations Single CLHS F2, Dual CLHS F2
Connectors 2 x SFP
Camera Support line scan camera, area scan camera
Sensor Type Grayscale sensor
Bit Depth any - output as raw data, 8-16-bit (grayscale)
Data Bandwidth 2 x 10 Gbit/s
Test Environment Camera Simulator

Host PC Interface

PC Bus Interface PCI Express x4 (Gen 2), DMA1800
PC Bus Interface Performance up to 1.800 MB/s (sustainable)

Controls and General-Purpose I/Os

On-board GPIO interface One 34-pin flat cable connector onboard: 4 opto-coupled inputs (4,5V - 28V), optional 2 opto-coupled differential inputs (RS422), Shaft encoder input, programmable rescaler, multiple-camera synchronization, 4 opto-coupled outputs (4,5V - 28V)
On-board Front GPIO Interface optional (conf.): 4 opto-coupled Inputs (4,5V - 28V) with up to 1 MHz frequency, One 15-pin D-Sub socket: 2 opto-coupled differential inputs (RS422) and 1 opto-coupled differential / single ended input, Shaft encoder input, programmable rescaler: multiple-camera synchronization, 2 TTL outputs, up to 20 MHz frequency
GPIO Synchronisation and Control Configurable Trigger System supporting several trigger modes (grabber controlled, external trigger, gated, software trigger) and shaft encoder functionality with backward compensation, Multi-Camera-Synchronization
GPIO Interface Summary onboard: 8in/8out (max.), TTL or opto-coupled

Processing Features

Basic Features ROI, Image Selector

Physical and Environmental Information

Dimensions PCIe Standard height, half length card: 167.64 mm length x 111.15 mm height
Weight (typical) 150 g
Power consumption / Power Source typ. 1A @ 12V (actual values depend on image pre-processing)
Operating Temperature 50° (0 LFM*), 60° (100 LFM*) FPGA operating temperature: 0°C to 85°C, *LFM = Linear Feet per Minute, unit for measuring airflow velocity
Storage Temperature -50°C up to 80°C
Relative Humidity (operating, storage) 5% - 90% non-condensing (operating), 0% - 95% (storage)
MTBF pending
Compliances RoHS, REACH, WEEE

Software

Software drivers Windows 10 / 8 / 7 (64-Bit), Windows 10 / 8 / 7 (32-Bit)
Software Tools Device Drivers, Documentation, SDK, GenICam Explorer (Camera configuration tool), microDiagnostics (Service tool), microDisplay (Acquisition control and viewer)
Software API .net interface, Silicon Software SDK
FPGA programming not programmable
BV-Software Compatibility Halcon, Common Vision Blox, others on request
Triggerboard

Triggerboard

  • Opto trigger: opto-coupled signals
  • TTL trigger: standard TTL level
  • Multiple input and output signals (max. 8x in, 8x out)
  • Synchronization of the image acquisition process
  • Synchronization of multiple cameras in the image acquisition system
  • Control of the camera’s exposure time
  • Independent control of multiple cameras connected to a frame grabber
  • Highly flexible graphic programming of user-defined trigger functions with VisualApplets

Matching accessories often sold together with this product:

value

Manuals

The manuals provide complete information on all aspects of usage - from installing frame grabbers and software to first acquisition checks to advanced image processing. Described are all frame grabber series and models available together with their hardware and software add-ons, their specific functionalities and all image processing options along with the graphical FPGA development environment VisualApplets.

Frame Grabber - User Manual

All Manuals - microEnable 5 marathon AF2
value

Customer Stories

Basler Customer Stories describe a broad diversity of applications and potential uses for Basler frame grabbers on a variety of markets. They explain the requirements Basler’s customers had to face while designing their image processing system and how Basler frame frabbers successfully contributed to resolving the problem.

All Customer Stories - microEnable 5 marathon AF2

Compatible Cameras